1. The Field of the Invention
The present invention relates generally to the field of fiber optic transceivers and their use and particularly to transceivers incorporating electronic equalizers for electronic dispersion compensation (EDC).
2. The Relevant Technology
As fiber optic transmission systems are pushed to higher data rates and longer transmission distances, they are often limited by one or another form of optical dispersion where there is a velocity spread in the components of the signal. This velocity spread tends to spread the optical pulses in time, which causes the pulses that make up the 0's and 1's of most transmission systems to spread into one another, leading to an impairment known as inter-symbol interference (ISI). As ISI increases, it will eventually destroy any clear distinction in the level of a 0 or a 1 (also known as closing the optical eye), which is the basis that most simple detection systems use to make an error free decision.
The use of electronic equalizers, very common in many other fields, such as radio transmission, copper based high speed electronic links, and disk drive read circuits, is now finding applications in optical transmission systems, where they can be used in optical receivers to successfully detect signals which are otherwise unusable in simple receivers. The operation of electronic equalizers can be based on a number of techniques, such as the use of filters that combine the signal with itself at different delays and with different weights. Sometimes, the signal after a decision element, is fed back, again with different delays and weights, and combined with the signal from a first equalizer (known as decision feedback equalization or DFE). A key element of an EDC link is a system by which the tap weights are set in order to achieve a successful determination of the original signal.
EDC is now starting to be used in at least two important applications in fiber optic transmissions. The first is to extend the distances over which high speed links based on Electro-absorption modulators can operate. These systems' maximum link distance is critically dependent on properties of the devices known as their wavelength chirp, which tend to be difficult to control beyond a certain point. It has been shown that EDC techniques can greatly increase the yield of such systems at their normal limits (say for 80 km transmission at 10 Gb/s), or to reach distances normally impractical for unequalized systems (say achieving 120 km at 10 Gb/s). Longer distances in these systems are of great commercial value as they either eliminate the need for expensive optical amplifiers and their support infrastructure, or reduce the number of amplifiers needed in a given application.
The second application, currently being standardized in the Institute for Electrical and Electronics Engineers (IEEE) for use in 10 Gb/s Ethernet, is the extension of the distance over which 10 Gb/s data can be transmitted on legacy multimode fiber. For the most common grade of presently installed multimode fiber, normal techniques generally do not achieve transmission distances beyond 100 m, whereas the most interesting use of these links require transmission distances of at least 220 m with a strong preference for 300 m. In the case of multimode fiber, link distances are limited by modal dispersion, that is, the differences in the effective velocity of the different fiber modes caused by imperfections in the index profiles of the fibers. Depending on the degree of these imperfections, EDC techniques can often be used to achieve the desired distance of 300 m. However, it appears that an important fraction of these fibers may have imperfections that are so great that they cannot be equalized with practical EDC techniques.
It is generally easy to determine when an EDC or other receiver has exceeded its limitations to detect data accurately, as the host system can determine whether errors have occurred by a variety of techniques. In the case of multimode fiber applications, this information might be used to switch to another fiber with better modal dispersion characteristics. However, this ignores another practical issue: link reliability. For every system beyond the failure point, there are likely to be a similar or larger number of links just below the failure point which may easily fail later due to any number of small changes to the link, such as temperature induced changes of transmitter power, receiver sensitivity or changes in the fiber modal dispersion due to manipulation of the fiber links. Systems on the edge of failure are highly undesirable, and information on whether a system has adequate margin would be very valuable for avoiding this problem.
There are currently a number of ways in which diagnostic information concerning the various operating parameters of a fiber optic system can be collected. In one application, diagnostic information about aspects of the transceiver operation such as received and transmitted power, temperature and the like, is provided from a fiber optic transceiver to a host system.
With attention now to FIG. 1, details are provided concerning a typical optical transceiver module 1. The optical transceiver module 1, also referred to herein as a “transceiver,” or “transceiver module,” includes a receiver optical subassembly (ROSA) 2 and an associated post amplifier 4. Transceiver module 1 also includes a transmitter optical subassembly (TOSA) 3 and an associated laser driver 5. The post amplifier 3 and the laser driver 5 are integrated circuits (IC) that communicate the high speed electrical signals to a host or other device.
In the illustrated implementation however, all other control and setup functions are implemented with a third single-chip integrated circuit 10 referred to as the controller IC. Exemplary embodiments of a controller IC are disclosed and claimed in U.S. patent application Ser. No. 09/777,917, entitled Integrated Memory Mapped Controller Circuit for Fiber Optics Transceiver, filed Feb. 5, 2001, which is incorporated herein by reference in its entirety.
The controller IC 10, or simply “controller”, communicates with and controls the postamp 4 and laser driver 5. Data lines 21 and 9 connect the postamp 4 to the controller 10, while data lines 7, 8, and 20 connect the laser driver 5 to the controller 10. An additional feedback signal line 6 can connect the ROSA 2 to the controller 10.
The controller 10 also handles all low speed communications with the end user. These low speed communications concern, among other things, the standardized pin functions such as a Loss of Signal (LOS) 14, a Transmitter Fault Indication (TX FAULT) 13, and the Transmitter Disable Input (TX DISABLE) 12, also sometimes referred to as “TXD.” The LOS indicator 14 is set to assert a digital signal when the received power at the transceiver falls below a predetermined limit indicating that it is likely that the received data is not usable.
The controller 10 can also have a two wire serial interface that, among other things, accesses memory mapped locations in the controller. The two wire serial interface of the controller 10 can be coupled to host device interface input/output lines, typically clock line 15 (SCL) and data line 16 (SDA). In at least one embodiment, the two wire serial interface operates in accordance with the two wire serial interface standard that is also used in the GBIC ,SFP and XFP transceiver standards, however other serial interfaces could equally well be used in alternate embodiments. Among other things, the two wire serial interface is used for all setup and querying of the controller 10, and enables access to the optoelectronic transceiver control circuitry as a memory mapped device.
During normal operation, the laser driver 5 receives differential transmission signals TX+ and TX− from differential transmission terminals 11, and condition the differential signals for proper optical transmission using TOSA 3. Also, the Postamp 4 outputs differential receive signals RX+ and RX− on differential receive terminals 17 based on optical signals received by ROSA 2. The transceiver 1 also has voltage supplies such as, for example, Vcc provided on terminal 19, and ground provided on terminal 18.
In a somewhat more elaborate system, such as a 2×10 small form factor transceiver, dedicated output pins provide analog voltage outputs proportional to signals of interest, such as the present bias current of the transceiver's laser diode. These may be used to detect problems such as the approach of failure for the device. (See, for example, the Revised Small Form Factor Multisource Agreement (SFF MSA), dated Jul. 5, 2000.)
More sophisticated systems use serial communication links to transmit more detailed diagnostic information in a more convenient digital format. FIG. 2 shows a serial communications interface, in this case a 2 wire serial interface known as I2C, on pins 15 and 16, which are often used to communicate diagnostics information. These systems fall into two general categories. The first is a command-based system where the host provides a query command for a particular piece of information, and the transceiver provides the data using a predetermined protocol. As an example, this system is used as part of the 300-pin transceiver standard contained in the Multi-Source Agreement (MSA) “I2C Reference Document for 300 Pin MSA 10 G and 40 G Transponder”, dated Aug. 4, 2003.
A second technique, and one that has become more commonly employed, is known as a memory mapped diagnostics system. In this system, various pieces of diagnostic information are provided in predetermined address locations as if they were stored in a permanent memory. The host system queries this memory address and reads the diagnostics data that is presently stored there by the transceiver. This system evolved from earlier transceivers that used an Electrically Erasable Programmable Read Only Memory (EEPROM) device to store and provide static identification information on the transceiver (such as the link types it supports or it's serial number) to the host system. One example of a memory mapped diagnostics system can be found in the Digital Diagnostic Monitoring Interface for Optical Transceivers, SFF document number: SFF-8472, rev. 9.5, Jun. 1, 2004, which is incorporated herein by reference in its entirety.
These two types of systems commonly use one of two protocols to communicate this information. The first is known as Management Data Input/Output (MDIO) that is used widely in IEEE standards and in the XENPAK, X2 and related optical transceivers. Copies of these standards can be found on the world wide web at: http://www.xenpak.org/MSA/XENPAK_MSA_R3.0.pdf, and http://www.x2msa.org/X2_MSA_Rev2.pdf. The second protocol, which is more widely used, is known as I2C (sometimes written as I2C) which is used on many control and diagnostics systems ranging from memories to various sensor systems. I2C for digital diagnostics is now used in GigaBit Interface Converters (GBICs), SFF, SFP and XFP transceivers (as defined by the MSA). I2C is used for EEPROM communications in all GBICs.
Finally, there are sometimes EDC diagnostics on the integrated circuit (IC) level. Diagnostic information on the state of EDCs is often provided at the level of the IC that implements the EDC function. This information in existing designs often consists of the values of the tap weights of the various equalizer elements. Parallel, analog, or digital lines either provide this, or these lines may be multiplexed to single outputs. Alternatively, this data can be read out through a standard serial interface similar to those described above. An EDC circuit is illustrated in FIG. 2, with a serial interface for communicating the values of tap weights. Another example of prior art EDC diagnostics on the integrated circuit level is the use of circuitry which evaluates the quality of the equalized signal often referred to as measuring the eye quality.